Radish alpha
H
rad:z3QDZAW2FAfuLvihrhiyDC9fAD8G9
HardenedBSD Package Manager
Radicle
Git
Add RISC-V ABI aliases
Mitchell Horne committed 5 years ago
commit 49d340ef951f92e5889e30e58eaa96626398a591
parent 479bf5c
2 files changed +25 -0
modified libpkg/pkg_elf.c
@@ -1029,6 +1029,23 @@ pkg_get_myarch_elfparse(char *dest, size_t sz, struct os_info *oi)
		snprintf(dest + strlen(dest), sz - strlen(dest), ":%s:%s:%s:%s",
		    arch, wordsize_corres_str, endian_corres_str, abi);
		break;
+
#if defined(EM_RISCV) && defined(EF_RISCV_FLOAT_ABI_MASK)
+
	case EM_RISCV:
+
		switch (elfhdr.e_flags & EF_RISCV_FLOAT_ABI_MASK) {
+
			case EF_RISCV_FLOAT_ABI_SOFT:
+
				abi = "sf";
+
				break;
+
			case EF_RISCV_FLOAT_ABI_DOUBLE:
+
				abi = "hf";
+
				break;
+
			default:
+
				abi = "unknown";
+
				break;
+
		}
+
		snprintf(dest + strlen(dest), sz - strlen(dest), ":%s:%s:%s",
+
		    arch, wordsize_corres_str, abi);
+
		break;
+
#endif
	default:
		snprintf(dest + strlen(dest), sz - strlen(dest), ":%s:%s",
		    arch, wordsize_corres_str);
modified libpkg/private/elf_tables.h
@@ -40,6 +40,9 @@ static const struct _elf_corres mach_corres[] = {
	{ EM_MIPS, "mips" },
	{ EM_PPC, "powerpc" },
	{ EM_PPC64, "powerpc" },
+
#ifdef EM_RISCV
+
	{ EM_RISCV, "riscv" },
+
#endif
	{ EM_SPARCV9, "sparc64" },
	{ EM_IA_64, "ia64" },
	{ -1, NULL },
@@ -105,6 +108,11 @@ static struct arch_trans machine_arch_translation[] = {
	{ "mips:32:eb:n32", "mipsn32" },
	{ "mips:64:el:n64", "mips64el" },
	{ "mips:64:eb:n64", "mips64" },
+
	/* And RISC-V */
+
	{ "riscv:32:hf", "riscv32" },
+
	{ "riscv:32:sf", "riscv32sf" },
+
	{ "riscv:64:hf", "riscv64" },
+
	{ "riscv:64:sf", "riscv64sf" },

	{ NULL, NULL }
};